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Freescale Semiconductor /MKL27Z4 /SPI0 /C2

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Interpret as C2

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7 43 0 0 00 0 0 0 0 0 0 0 0 (0)SPC0 0 (0)SPISWAI 0 (0)RXDMAE 0 (0)BIDIROE 0 (0)MODFEN 0 (0)TXDMAE 0 (0)SPIMODE 0 (0)SPMIE

SPIMODE=0, MODFEN=0, SPC0=0, TXDMAE=0, SPMIE=0, RXDMAE=0, BIDIROE=0, SPISWAI=0

Description

SPI Control Register 2

Fields

SPC0

SPI Pin Control 0

0 (0): SPI uses separate pins for data input and data output (pin mode is normal). In master mode of operation: MISO is master in and MOSI is master out. In slave mode of operation: MISO is slave out and MOSI is slave in.

1 (1): SPI configured for single-wire bidirectional operation (pin mode is bidirectional). In master mode of operation: MISO is not used by SPI; MOSI is master in when BIDIROE is 0 or master I/O when BIDIROE is 1. In slave mode of operation: MISO is slave in when BIDIROE is 0 or slave I/O when BIDIROE is 1; MOSI is not used by SPI.
SPISWAI

SPI Stop in Wait Mode

0 (0): SPI clocks continue to operate in Wait mode.

1 (1): SPI clocks stop when the MCU enters Wait mode.
RXDMAE

Receive DMA enable

0 (0): DMA request for receive is disabled and interrupt from SPRF is allowed

1 (1): DMA request for receive is enabled and interrupt from SPRF is disabled
BIDIROE

Bidirectional Mode Output Enable

0 (0): Output driver disabled so SPI data I/O pin acts as an input

1 (1): SPI I/O pin enabled as an output
MODFEN

Master Mode-Fault Function Enable

0 (0): Mode fault function disabled, master SS pin reverts to general-purpose I/O not controlled by SPI

1 (1): Mode fault function enabled, master SS pin acts as the mode fault input or the slave select output
TXDMAE

Transmit DMA enable

0 (0): DMA request for transmit is disabled and interrupt from SPTEF is allowed

1 (1): DMA request for transmit is enabled and interrupt from SPTEF is disabled
SPIMODE

SPI 8-bit or 16-bit mode

0 (0): 8-bit SPI shift register, match register, and buffers

1 (1): 16-bit SPI shift register, match register, and buffers
SPMIE

SPI Match Interrupt Enable

0 (0): Interrupts from SPMF inhibited (use polling)

1 (1): When SPMF is 1, requests a hardware interrupt

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data